Laurent Pain is graduated from the Ecole Nationale Supérieure de Physique de Grenoble in 1992. He received his Ph D after his work on DUV resists study. He joined CEA-LETI in 1996 to work on infra-red technology, and then came back to STmicroelectronics in 1999 working on 193nm and e-beam lithography technologies.
From 2008 to 2014, Laurent Pain leaded the lithography laboratory of the silicon technology division of CEA-LETI. He was also managing in parallel the industrial consortium IMAGINE dedicated to the development of multibeam lithography with MAPPER lithography BV.
Since July 2014, within the LETI Silicon Technology Division, he is now in charge of the business and the partnerships developments of the Silicon Technologies Platform Division.