Bio:

Laurent Rémont joined Soitec in March 2026 and formally took up the position of Chief Executive Officer on 1 April, 2026.

Laurent Rémont served as Senior Vice President and General Manager of MEMS and Magnetics at Infineon Technologies, a leading integrated semiconductor manufacturer, which he joined in 2019. He has also led the Group's Radio Frequency and Sensors business, covering a portfolio that included sensors, radars, microphones and RF components, as well as systems and IoT innovation activities.

Before joining Infineon, he was Chief Technology Officer (CTO) and executive committee member at Kontron AG, an international specialist in industrial IoT solutions and embedded systems.

He began his career at Philips, before spending more than fifteen years at STMicroelectronics, where he held various general management positions in the Connected Home division, as well as in R&D, embedded systems, product development and operational unit management.

Laurent Rémont holds an engineering degree from Grenoble INP – ENSERG

Abstract:

The semiconductor industry has entered a new system architecture era driven by the three waves of AI: Generative, Agentic, and Physical. As compute demand scales, traditional silicon infrastructure is hitting critical bottlenecks that require material-led innovation. To break through the bandwidth wall and prevent copper links from consuming unsustainable power, the industry must transition to silicon photonics, migrating Co-Packaged Optics directly onto the interposer to achieve extreme shoreline densities. Simultaneously, with AI rack power scaling toward extreme levels, upgrading bulk silicon with engineered Wide-Bandgap substrates like Silicon Carbide and Gallium Nitride is vital to achieve maximum data center efficiency.
Finally, tackling the severe standby leakage of advanced sub-nanometer nodes in battery-constrained Physical AI devices requires a decisive architectural choice, pitting FD-SOI against advanced FinFET configurations. Ultimate AI scaling will be won through substrate-engineered innovation.