Bio:

Laurent Pain is graduated from the Ecole Nationale Supérieure de Physique de Grenoble in 1992. He received his Ph D after his work on DUV resists study. He joined CEA-Leti in 1996 to work on infra-red technology, and then came back to STmicroelectronics in 1999 working on 193nm and e-beam lithography technologies.

From 2008 to 2014, Laurent Pain leaded the lithography laboratory of the silicon technology division of CEA-Leti. He was also managing in parallel the industrial consortium IMAGINE dedicated to the development of multibeam lithography with MAPPER lithography BV.

Since July 2014, within the CEA-Leti Silicon Technology Division, he is now in charge of the business and the partnerships developments of the Silicon Technologies Platform Division.

Abstract:

The semiconductor industry underpins global digital transformation, with the ICT market expected to double by 2030 due to advances in AI, 5G, and cloud computing. A fundamental shift toward more resilient, sustainable, and circular manufacturing models is required to enable this growth. Key challenges include reducing water, gas, and metal consumption, minimizing PFAS dependence, and improving effluent circularity.

Attendees will hear how CEA-Leti’s comprehensive sustainability roadmap spanning the entire semiconductor value chain will integrate process innovation with system-level optimization to drive measurable environmental impact reduction. The SubFAB Labs initiative, developed in collaboration with International SubFAB Research Labs (ISRL), is a central pillar of the roadmap. This four-year program, which can be extended, will evaluate the subfab environment, from process to final waste treatment by improving material use, abatement strategy and global effluent? circularity. The aim is to reduce costs and global environmental impact.