Bio:

Pascal Vivet is Scientific Director of the Digital Systems and Integrated Circuits Division in CEA-List, Grenoble, France, and co-director of the IRT Nanoelec Smart Imager program. He received his PhD from Grenoble Polytechnical Institute in 2001, designing an asynchronous microprocessor. After 4 years within STMicroelectronics, he joined CEA-Leti in 2003 in the digital design lab. His research interests covers wide aspects of circuit and system level design, ranging from system integration, multi-core architecture, Network-on-Chip, energy efficient design, related CAD design aspects, and in strong links with advanced technologies such as 3D integration, Non-Volatile-Memories, photonics. He was project leader on 3D circuit design and integration since 2011. He participates to various TPC such as ASYNC, DATE, 3DIC, ISLPED conferences. He served as a member of the organizing committee of the 3D workshops series at DATE from 2013 to 2015, and to the D43D workshops since 2011, and to the 3DIC conference. He has authored and co-authored more than 120 papers and holds several patents in the field of digital design. He is member of IEEE.