Bio:

Dr. Wei-Chung Lo received his Ph.D. from National Taiwan University(NTU) and joined ITRI in 1997. Currently, He is deputy general director and senior principal engineer in EOSL of ITRI and visiting professor in Graduate School of Advanced Technology of NTU. He serves as Executive Secretary of AI on Chip Taiwan Alliance(AITA), and Chairman of 3D IC/Fan-Out consortium (Ad-STAC, Hi-CHIPS).
He has published more than 85 papers and 27 patent granted. His research interests focusing on Semiconductor Device, Waferlevel System Integration and Advanced electronic/opto-electronic packaging for more than 20 years, including Non-Volatile Memory(MRAM, Computing in Memory), 3D IC/ 3D SiP/ 3D Chiplets Integration, Silicon Photonics & Co-packaged Optics, WBG Power chip(GaN, SiC & Ga2O3), Power packaging and Power module, RF packaging(Antenna-in-package, AiP), and Integrated smart system and Heterogeneous Integration technology.